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november 2012 ? 2009 fairchild semiconductor corporation www.fairchildsemi.com fpf1014 / fpf1014 ? rev. 1.0.9 fpf1013 / fpf1014 ? intellimax? 1v-rat ed advanced load management products fpf1013 / fpf1014 intellimax? 1 v-rated advanced load management products features ? 0.8 v to 1.8 v input voltage range ? typical r ds(on) = 17 m ? at v on - v in = 2.0 v ? output discharge function ? internal pull-down at on pin ? accurate slew rate co ntrolled turn-on time ? low < 1 a quiescent current ? esd protected, above 8 kv hbm, 2 kv cdm applications ? pdas ? cell phones ? gps devices ? mp3 players ? digital cameras ? notebook computers description the fpf1013/14 intellimax? advanced slew rate load switch offers very low operating voltage and a 17 m ? n- channel mosfet that supports an input voltage up to 2.0 v. this slew-rate device control the switch turn-on and prevent excessive inrush current from supply rails. the input voltage range operat es from 0.8 v to 1.8 v to fulfill today's lowest mobile device supply requirements. switch control is via a logic input (on) capable of interfacing directly with low-voltage control signals. the fpf1014 has an on-chip pull-down, allowing for quick and controlled output discharge when the switch is turned off. the fpf10131/4 is available in a space- saving six-lead 1 mm x 1.5 mm wafer-level chip-scale package (wlcsp). figure 1. wlcsp bump configuration (top & bottom) figure 2. typical application ordering information part number switch turn-on time output discharge on pin activity package fpf1013 17 m ? , nmos 43 s n/a active high wlcsp 950 m x 1450 m, ( see figure 24 ) fpf1014 17 m ? , nmos 43 s 60 ? active high
? 2009 fairchild semiconductor corporation www.fairchildsemi.com fpf1013 / fpf1014 ? rev. 1.0.9 2 fpf1013 / fpf1014 ? intellimax? 1v-rat ed advanced load management products functional block diagram figure 3. functional block diagram pin configuration figure 4. pin configuration pin definitions pin name description a2, b2 v in supply input: input to the power switch and the supply voltage for the ic c2 on on control input a1, b1 v out switch output: output of the power switch c1 gnd ground
? 2009 fairchild semiconductor corporation www.fairchildsemi.com fpf1013 / fpf1014 ? rev. 1.0.9 3 fpf1013 / fpf1014 ? intellimax? 1v-rat ed advanced load management products absolute maximum ratings stresses exceeding the absolute maximum ratings may dam age the device. the device may not function or be operable above the recommended operating conditions and st ressing the parts to these levels is not recommended. in addition, extended exposure to stresses above the recomm ended operating conditions may affect device reliability. the absolute maximum ratings are stress ratings only. symbol parameter min. max. units v in , v out , to gnd -0.3 2.0 v v on to gnd -0.3 4.2 v i sw maximum continuous switch current 1.5 a p d power dissipation at t a = 25c (1) 1.2 w t a operating temperature range -40 +85 c t stg storage temperature -65 +150 c ja thermal resistance, junction to ambient 85 c/w esd electrostatic discharge protection human body model 8000 v charged device model 2000 v note: 1. package power dissipation on one-square-inch pad, two-ounce copper board. recommended operating conditions the recommended operating conditions table defines th e conditions for actual device operation. recommended operating conditions are specified to en sure optimal performance to the datash eet specifications. fairchild does not recommend exceeding them or designing to absolute maximum ratings. symbol parameter min. max. units v in supply voltage 0.8 1.8 v t a ambient operating temperature -40 +85 c
? 2009 fairchild semiconductor corporation www.fairchildsemi.com fpf1013 / fpf1014 ? rev. 1.0.9 4 fpf1013 / fpf1014 ? intellimax? 1v-rat ed advanced load management products electrical characteristics v in = 0.8 to 1.8v, t a = -40 to +85c unless otherwise noted. typical values are at v in =1.8v and t a = 25c. symbol parameter condition min. typ. max. units basic operation v in operating voltage 0.8 1.8 v v on(min) on input voltage v in = 0.8 v 1.8 2.8 4.0 v v on(max) v in = 1.8 v (2) 2.8 3.8 4.0 v i cc operating current v in = 1 v, v on = 3.3 v, v out = open 1 a i q quiescent current v in = 1 v, v on = gnd, v out = open 2 a i swoff off switch current v in = 1.8 v, v on = gnd, v out = gnd 2 a r on on-resistance v in = 1 v, v on = 3 v, i out = 1 a, t a = 25c 17 27 m ? v in = 1 v, v on = 2.3 v, i out = 1 a, t a = 25c 25 38 r pd output pull-down resistance v in = 1 v, v on = 0 v, i out = 1 ma, t a = 25c, fpf1014 60 120 ? v il on input logic low voltage v in = 0.8 v, r l = 1 k ? 0.3 v v in = 1.8 v, r l = 1 k ? 0.8 i on on input leakage v on = v in or gnd 1 a dynamic (v in = 1.0 v, v on = 3.0 v, t a = 25c) t r v out rise time r l = 500 ? , c l = 0.1 f 28 s r l = 3.3 ? , c l = 10 f 38 t on turn-on time r l = 500 ? , c l = 0.1 f 43 s r l = 3.3 ? , c l = 10 f 58 t f v out fall time fpf1014, r l = 500 ? , c l = 0.1 f 14 s fpf1014, r l = 3.3 ? , c l = 10 f 76 t off turn-off time fpf1014, r l = 500 ? , c l = 0.1 f 50 s fpf1014, r l = 3.3 ? , c l = 10 f 96 note: 2. v on(max) is limited by the absolute maximum rating.
? 2009 fairchild semiconductor corporation www.fairchildsemi.com fpf1013 / fpf1014 ? rev. 1.0.9 5 fpf1013 / fpf1014 ? intellimax? 1v-rat ed advanced load management products typical performance characteristics figure 5. supply current vs. v in figure 6. off quiescent current vs. temperature figure 7. operating current vs. temperature figure 8. off switch current vs. temperature figure 9. r on vs. temperature figure 10. r on vs. v on - v in
? 2009 fairchild semiconductor corporation www.fairchildsemi.com fpf1013 / fpf1014 ? rev. 1.0.9 6 fpf1013 / fpf1014 ? intellimax? 1v-rat ed advanced load management products typical performance characteristics figure 11. v il vs. v in figure 12. v il vs. temperature figure 13. t rise / t fall vs. temperature figure 14. t on / t off vs. temperature figure 15. turn-on response figure 16. fpf1014 turn-of f response
? 2009 fairchild semiconductor corporation www.fairchildsemi.com fpf1013 / fpf1014 ? rev. 1.0.9 7 fpf1013 / fpf1014 ? intellimax? 1v-rat ed advanced load management products typical performance characteristics figure 17. turn on response figure 18. fpf1014 turn-of f response figure 19. fpf1014 output pull-down response
? 2009 fairchild semiconductor corporation www.fairchildsemi.com fpf1013 / fpf1014 ? rev. 1.0.9 8 fpf1013 / fpf1014 ? intellimax? 1v-rat ed advanced load management products operational description the fpf1013/4 are low-r ds(on) n-channel load switches with controlled turn-on. the core of each device is a 17 m ? (v in = 1 v, v on = 3 v) n-channel mosfet and is customized for a low-input operating range of 0.8 v to 1.8 v. the on pin controls the state of the switch. the fpf1014 contains a 60 ? (typical) on-chip resistor, which is connected internally from vout to gnd for quick output discharge when the switch is turned off. on / off control the on pin is active high and controls the state of the switch. applying a continuous high signal holds the switch in the on state. to minimize the switch on resistance, the on pin voltage should exceed the input voltage by 2 v. this device is compatible with a gpio (general-purpose input / output) port, where the logic voltage level can be configured to 4 v v on v in + 2 v and power consumed is less than 1 a in steady state. figure 20. timing diagram where: td on = delay on time t r = v out rise time t on = turn-on time td off = delay off time t f = v out fall time t off = turn-off time figure 21. typical application
? 2009 fairchild semiconductor corporation www.fairchildsemi.com fpf1013 / fpf1014 ? rev. 1.0.9 9 fpf1013 / fpf1014 ? intellimax? 1v-rat ed advanced load management products application information input capacitor to limit the voltage drop on the input supply caused by transient in-rush currents w hen the switch turns-on, a capacitor must be placed between vin and gnd. for minimized voltage drop, especially when the operating voltage approaches 1 v a 10 f ceramic capacitor should be placed close to the vin pins. higher values of c in can be used to further reduce the voltage drop during higher current modes of operation. output capacitor a 0.1 f capacitor, c l , should be placed between vout and gnd. this capacitor prevents parasitic board inductance from forcing v out below gnd when the switch turns off. if the application has a capacitive load, the fpf1014 can be used to discharge that load through an on-chip output discharge path. board layout for best performance, all traces should be as short as possible. to be most effective, the input and output capacitors should be placed close to the device to minimize the effects that parasitic trace inductances may have on normal and short-circuit operation. using wide traces or large copper planes for all pins (vin, vout, on, and gnd) helps minimize the parasitic electrical effects along with minimizing the case-to- ambient thermal impedance. improving thermal performance improper layout can result in higher junction temperature. this applies when continuous operation current is set to maximum allowed current and switch turns into a large capacitive load that introduces high inrush current in the transient. since fpf1013/14 does not have thermal shutdown f eature, proper layout can essentially reduce power diss ipation of the switch in transient and prevents the switch exceeding the maximum absolute power dissipation of 1.2 w. the vin, vout, and gnd pins dissipate most of the heat generated during a high load current condition. the layout suggested in figure 22 provides each pin with adequate copper so that heat may be transferred as efficiently as possible out of the device. the on pin trace may be laid out diagonally from the device to maximize the area available to the ground pad. placing the input and output capacitor s as close to the device as possible also contributes to heat dissipation, particularly during high load currents. figure 22. proper layout of output, input, and ground copper area demonstration board layout fpf1013/4 demonstration b oard has the components and circuitry to demonstrate the load switches functions. thermal performance is improved using techniques recommended in the layout recommendations section of datasheet. figure 23. demonstration board layout
? 2009 fairchild semiconductor corporation www.fairchildsemi.com fpf1013 / fpf1014 ? rev. 1.0.9 10 fpf1013 / fpf1014 ? intellimax? 1v-rat ed advanced load management products physical dimensions figure 24. 6- ball wa fer-level chip-scale package ( wlcsp) 2x3 array, 0.5 mm pitch, 300 m ball e d x y 950 m 30 m 1450 m 30 m 225 m 225 m package drawings are provided as a service to customers consi dering fairchild components. drawings may change in any manner without notice. please note the revision and/or date on the drawi ng and contact a fairchild semiconductor representative to ver ify or obtain the most recent revision. package specifications do not expand the terms of fairchild?s worldwide terms and conditions, specifically the warranty therein, which covers fairchild products. always visit fairchild semiconductor?s online packagi ng area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ . bottom view side views recommended land pattern ball a1 index area seating plane a1 f (nsmd pad type) (?0.350) solder mask opening (x) 0.018 (y) 0.018 (?0.250) cu pad 0.06 c 0.05 c e d f notes: a. no jedec registration applies. b. dimensions are in millimeters. c. dimensions and tolerance per asmey14.5m, 1994. d. datum c is defined by the spherical crowns of the balls. e. package nominal height is 582 microns 43 microns (539-625 microns). f. for dimensions d, e, x, and y see product datasheet. g. drawing filname: mkt-uc006afrev2. 0.03 c 2x 0.03 c 2x ?0.315 +/- .025 6x 1 2 a b c 0.3320.018 0.2500.025 d e (1.00) (0.50) 0.005 cab 0.50 0.50 1.00 0.625 0.539 top view b a c
? 2009 fairchild semiconductor corporation www.fairchildsemi.com fpf1013 / fpf1014 ? rev. 1.0.9 11 fpf1013 / fpf1014 ? intellimax? 1v-rat ed advanced load management products

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